Cylone V SoC FPGA Board Configuration

Pin Assignments:

Pin Assignment Table:

Name Location Direction Standard
OSC_50_B3B AF14 input 1.5 V
OSC_50_B4A AA16 input 1.5 V
OSC_50_B5B Y26 input 2.5 V
OSC_50_B8A K14 input 2.5 V

Name Location Direction Standard
LED[0] AF10 output 3.3-V LVTTL
LED[1] AD10 output 3.3-V LVTTL
LED[2] AE11 output 3.3-V LVTTL
LED[3] AD7 output 3.3-V LVTTL

Name Location Direction Standard
KEY[0] AE9 input 3.3-V LVTTL
KEY[1] AE12 input 3.3-V LVTTL
KEY[2] AD9 input 3.3-V LVTTL
KEY[3] AD11 input 3.3-V LVTTL
RESET_n AD27 input 3.3-V LVTTL

Name Location Direction Standard
SW[0] W25 input 2.5 V
SW[1] V25 input 2.5 V
SW[2] AC28 input 2.5 V
SW[3] AC29 input 2.5 V

Name Location Direction Standard
SI5338_SCL AE26 output 3.3-V LVTTL
SI5338_SDA AJ29 inout 3.3-V LVTTL

Name Location Direction Standard
TEMP_CS_n AF8 output 3.3-V LVTTL
TEMP_DIN AG7 output 3.3-V LVTTL
TEMP_SCLK AF9 output 3.3-V LVTTL

Name Location Direction Standard
VGA_HS AD12 output 3.3-V LVTTL
VGA_VS AC12 output 3.3-V LVTTL
VGA_SYNC_n AG2 output 3.3-V LVTTL
VGA_CLK W20 output 3.3-V LVTTL
VGA_BLANK_n AH3 output 3.3-V LVTTL
VGA_R[0] AG5 output 3.3-V LVTTL
VGA_R[1] AA12 output 3.3-V LVTTL
VGA_R[2] AB12 output 3.3-V LVTTL
VGA_R[3] AF6 output 3.3-V LVTTL
VGA_R[4] AG6 output 3.3-V LVTTL
VGA_R[5] AJ2 output 3.3-V LVTTL
VGA_R[6] AH5 output 3.3-V LVTTL
VGA_R[7] AJ1 output 3.3-V LVTTL
VGA_G[0] Y21 output 3.3-V LVTTL
VGA_G[1] AA25 output 3.3-V LVTTL
VGA_G[2] AB26 output 3.3-V LVTTL
VGA_G[3] AB22 output 3.3-V LVTTL
VGA_G[4] AB23 output 3.3-V LVTTL
VGA_G[5] AA24 output 3.3-V LVTTL
VGA_G[6] AB25 output 3.3-V LVTTL
VGA_G[7] AE27 output 3.3-V LVTTL
VGA_B[0] AE28 output 3.3-V LVTTL
VGA_B[1] Y23 output 3.3-V LVTTL
VGA_B[2] Y24 output 3.3-V LVTTL
VGA_B[3] AG28 output 3.3-V LVTTL
VGA_B[4] AF28 output 3.3-V LVTTL
VGA_B[5] V23 output 3.3-V LVTTL
VGA_B[6] W24 output 3.3-V LVTTL
VGA_B[7] AF29 output 3.3-V LVTTL

Name Location Direction Standard
AUD_XCK AC9 output 3.3-V LVTTL
AUD_BCLK AE7 inout 3.3-V LVTTL
AUD_MUTE AD26 output 3.3-V LVTTL

I2C for Audio
Name Location Direction Standard
AUD_I2C_SCLK AH30 output 3.3-V LVTTL
AUD_I2C_SDAT AF30 inout 3.3-V LVTTL

Name Location Direction Standard
DDR3_CK_p AA14 output Differential 1.5-V SSTL Class I
DDR3_CK_n AA15 output Differential 1.5-V SSTL Class I
DDR3_DQS_p[0] V16 inout Differential 1.5-V SSTL Class I
DDR3_DQS_n[0] W16 inout Differential 1.5-V SSTL Class I
DDR3_DQS_p[1] V17 inout Differential 1.5-V SSTL Class I
DDR3_DQS_n[1] W17 inout Differential 1.5-V SSTL Class I
DDR3_DQS_p[2] Y17 inout Differential 1.5-V SSTL Class I
DDR3_DQS_n[2] AA18 inout Differential 1.5-V SSTL Class I
DDR3_DQS_p[3] AC20 inout Differential 1.5-V SSTL Class I
DDR3_DQS_n[3] AD19 inout Differential 1.5-V SSTL Class I
DDR3_CKE AJ21 output SSTL-15 Class I
DDR3_CS_n AB15 output SSTL-15 Class I
DDR3_RESET_n AK21 output SSTL-15 Class I
DDR3_WE_n AJ6 output SSTL-15 Class I
DDR3_RAS_n AH8 output SSTL-15 Class I
DDR3_CAS_n AH7 output SSTL-15 Class I
DDR3_BA[0] AH10 output SSTL-15 Class I
DDR3_BA[1] AJ11 output SSTL-15 Class I
DDR3_BA[2] AK11 output SSTL-15 Class I
DDR3_DM[0] AH17 output SSTL-15 Class I
DDR3_DM[1] AG23 output SSTL-15 Class I
DDR3_DM[2] AK23 output SSTL-15 Class I
DDR3_DM[3] AJ27 output SSTL-15 Class I
DDR3_ODT AE16 output SSTL-15 Class I
DDR3_RZQ AG17 input 1.5 V
DDR3_DQ[0] AF18 inout SSTL-15 Class I
DDR3_DQ[1] AE17 inout SSTL-15 Class I
DDR3_DQ[2] AG16 inout SSTL-15 Class I
DDR3_DQ[3] AF16 inout SSTL-15 Class I
DDR3_DQ[4] AH20 inout SSTL-15 Class I
DDR3_DQ[5] AG21 inout SSTL-15 Class I
DDR3_DQ[6] AJ16 inout SSTL-15 Class I
DDR3_DQ[7] AH18 inout SSTL-15 Class I
DDR3_DQ[8] AK18 inout SSTL-15 Class I
DDR3_DQ[9] AJ17 inout SSTL-15 Class I
DDR3_DQ[10] AG18 inout SSTL-15 Class I
DDR3_DQ[11] AK19 inout SSTL-15 Class I
DDR3_DQ[12] AG20 inout SSTL-15 Class I
DDR3_DQ[13] AF19 inout SSTL-15 Class I
DDR3_DQ[14] AJ20 inout SSTL-15 Class I
DDR3_DQ[15] AH24 inout SSTL-15 Class I
DDR3_DQ[16] AE19 inout SSTL-15 Class I
DDR3_DQ[17] AE18 inout SSTL-15 Class I
DDR3_DQ[18] AG22 inout SSTL-15 Class I
DDR3_DQ[19] AK22 inout SSTL-15 Class I
DDR3_DQ[20] AF21 inout SSTL-15 Class I
DDR3_DQ[21] AF20 inout SSTL-15 Class I
DDR3_DQ[22] AH23 inout SSTL-15 Class I
DDR3_DQ[23] AK24 inout SSTL-15 Class I
DDR3_DQ[24] AF24 inout SSTL-15 Class I
DDR3_DQ[25] AF23 inout SSTL-15 Class I
DDR3_DQ[26] AJ24 inout SSTL-15 Class I
DDR3_DQ[27] AK26 inout SSTL-15 Class I
DDR3_DQ[28] AE23 inout SSTL-15 Class I
DDR3_DQ[29] AE22 inout SSTL-15 Class I
DDR3_DQ[30] AG25 inout SSTL-15 Class I
DDR3_DQ[31] AK27 inout SSTL-15 Class I
DDR3_A[0] AJ14 output SSTL-15 Class I
DDR3_A[1] AK14 output SSTL-15 Class I
DDR3_A[2] AH12 output SSTL-15 Class I
DDR3_A[3] AJ12 output SSTL-15 Class I
DDR3_A[4] AG15 output SSTL-15 Class I
DDR3_A[5] AH15 output SSTL-15 Class I
DDR3_A[6] AK12 output SSTL-15 Class I
DDR3_A[7] AK13 output SSTL-15 Class I
DDR3_A[8] AH13 output SSTL-15 Class I
DDR3_A[9] AH14 output SSTL-15 Class I
DDR3_A[10] AJ9 output SSTL-15 Class I
DDR3_A[11] AK9 output SSTL-15 Class I
DDR3_A[12] AK7 output SSTL-15 Class I
DDR3_A[13] AK8 output SSTL-15 Class I
DDR3_A[14] AG12 output SSTL-15 Class I

HSMC connect to HTG - HSMC to PIO Adaptor
Name Location Direction Standard HSMC Pin Index
GPIO1_35 A9 inout 3.3-V LVTTL 47
GPIO1_31 G12 inout 3.3-V LVTTL 48
GPIO1_33 A8 inout 3.3-V LVTTL 49
GPIO1_29 G11 inout 3.3-V LVTTL 50
GPIO1_34 E8 inout 3.3-V LVTTL 53
GPIO1_27 K12 inout 3.3-V LVTTL 54
GPIO1_32 D7 inout 3.3-V LVTTL 55
GPIO1_25 J12 inout 3.3-V LVTTL 56
GPIO1_30 G7 inout 3.3-V LVTTL 59
GPIO1_23 G10 inout 3.3-V LVTTL 60
GPIO1_28 F6 inout 3.3-V LVTTL 61
GPIO1_21 F10 inout 3.3-V LVTTL 62
GPIO1_26 D6 inout 3.3-V LVTTL 65
GPIO1_19 J10 inout 3.3-V LVTTL 66
GPIO1_24 C5 inout 3.3-V LVTTL 67
GPIO1_17 J9 inout 3.3-V LVTTL 68
GPIO1_22 D5 inout 3.3-V LVTTL 71
GPIO1_15 K7 inout 3.3-V LVTTL 72
GPIO1_20 C4 inout 3.3-V LVTTL 73
GPIO1_13 K8 inout 3.3-V LVTTL 74
GPIO1_14 E3 inout 3.3-V LVTTL 77
GPIO1_11 J7 inout 3.3-V LVTTL 78
GPIO1_12 E2 inout 3.3-V LVTTL 79
GPIO1_9 H7 inout 3.3-V LVTTL 80
GPIO1_10 E4 inout 3.3-V LVTTL 83
GPIO1_7 H8 inout 3.3-V LVTTL 84
GPIO1_8 D4 inout 3.3-V LVTTL 85
GPIO1_5 G8 inout 3.3-V LVTTL 86
GPIO1_6 C3 inout 3.3-V LVTTL 89
GPIO1_3 F9 inout 3.3-V LVTTL 90
GPIO1_4 B3 inout 3.3-V LVTTL 91
GPIO1_1 F8 inout 3.3-V LVTTL 92
GPIO1_18 E7 inout 3.3-V LVTTL 95
GPIO1_2 AA26 inout 3.3-V LVTTL 96
GPIO1_16 E6 inout 3.3-V LVTTL 97
GPIO1_0 AB27 inout 3.3-V LVTTL 98
GPIO0_35 D2 inout 3.3-V LVTTL 107
GPIO0_31 B6 inout 3.3-V LVTTL 108
GPIO0_33 C2 inout 3.3-V LVTTL 109
GPIO0_29 B5 inout 3.3-V LVTTL 110
GPIO0_34 B2 inout 3.3-V LVTTL 113
GPIO0_27 E9 inout 3.3-V LVTTL 114
GPIO0_32 B1 inout 3.3-V LVTTL 115
GPIO0_25 D9 inout 3.3-V LVTTL 116
GPIO0_30 A4 inout 3.3-V LVTTL 119
GPIO0_23 E12 inout 3.3-V LVTTL 120
GPIO0_28 A3 inout 3.3-V LVTTL 121
GPIO0_21 D12 inout 3.3-V LVTTL 122
GPIO0_26 A6 inout 3.3-V LVTTL 125
GPIO0_19 D11 inout 3.3-V LVTTL 126
GPIO0_24 A5 inout 3.3-V LVTTL 127
GPIO0_17 D10 inout 3.3-V LVTTL 128
GPIO0_22 C7 inout 3.3-V LVTTL 131
GPIO0_15 C13 inout 3.3-V LVTTL 132
GPIO0_20 B7 inout 3.3-V LVTTL 133
GPIO0_13 B12 inout 3.3-V LVTTL 134
GPIO0_14 C8 inout 3.3-V LVTTL 137
GPIO0_11 F13 inout 3.3-V LVTTL 138
GPIO0_12 B8 inout 3.3-V LVTTL 139
GPIO0_9 E13 inout 3.3-V LVTTL 140
GPIO0_10 C12 inout 3.3-V LVTTL 143
GPIO0_7 H14 inout 3.3-V LVTTL 144
GPIO0_8 B11 inout 3.3-V LVTTL 145
GPIO0_5 G13 inout 3.3-V LVTTL 146
GPIO0_6 B13 inout 3.3-V LVTTL 149
GPIO0_3 F15 inout 3.3-V LVTTL 150
GPIO0_4 A13 inout 3.3-V LVTTL 151
GPIO0_1 F14 inout 3.3-V LVTTL 152
GPIO0_18 A11 inout 3.3-V LVTTL 155
GPIO0_2 H15 inout 3.3-V LVTTL 156
GPIO0_16 A10 inout 3.3-V LVTTL 157
GPIO0_0 G15 inout 3.3-V LVTTL 158